1. Field of the Invention
Example embodiments of the present invention relate to bus systems, bus apparatuses, and methods of operating bus systems.
2. Description of the Related Art
A bus allows for a communication channel to be shared by several devices. For example, physically, a bus may be a group of communication wires, which connects several devices to each other, either, in parallel or in serial, according to a bus specification. In another example, a bus may be a protocol for data transmission between transmitters and receivers.
For data transmission, a cyclic redundancy check (CRC) may be used to detect data transmission failure. For example, a data transmitter may compute a CRC code of data to be transmitted and may append the computed CRC code to the transmitted data, for example, in a portion of the data known as the header. The data receiver may receive the transmitted data with the CRC code and compute the CRC code to compare the computed CRC code with the received CRC code appended to the received data. The integrity of the received data may be determined based on the comparison.
The data transmitter and the data receiver may divide data transferred therebetween into multiple segments each of which may include data having a given length. Each segment (e.g., packet, frame, etc.) may include a data header and a data body. The data receiver may compute the CRC code of data header and the CRC code of the data body to compare with the received CRC codes of the data header and the data body, respectively, to determine an integrity of the received data.
Bus protocols may also be adopted for a multi-layered bus architecture. In a multi-layered bus architecture, a bus component, which belongs to a lower layer such as a physical layer, may operate in response to a request from an upper layer such as a logical layer.
As sizes of digital data and/or device performance are increased, increased speed in transmitting data may be needed for a bus interface in order to accommodate various types of devices (e.g., transmitters and/or receivers, etc.). For example, bus usage time for each bus device may be decreased such that other bus devices may have more opportunities to use limited bus resources shared by multiple bus devices. In current bus systems and/or specifications, the CRC may not increase an efficiency of the bus.
For example, the IEEE-1394 bus standard enables increased speed data transmission between various digital devices such as a personal computer, digital camcorder, personal digital assistant (PDA), etc. The IEEE-1394 bus may utilize a tree type or daisy-chain type topology, and may support data rates up to, for example, 400 Mbps.
A node (e.g., transmitting and/or receiving) conforming to the IEEE-1394 standard may include a lower layer, for example, a physical layer (PHY layer) and an upper layer, for example, a link layer (LINK layer). The PHY layer and the LINK layer may each be implemented on a chip, and the node may include a PHY layer chip and a LINK layer chip.
In operation, the PHY layer chip may initialize the bus, encode and decode data, perform bus arbitration and/or generate and detect a bias voltage. The LINK layer chip may perform CRC computation, CRC error detection, and data packet generation and detection.
FIG. 1 is a schematic diagram illustrating an example related art IEEE-1394 network topology.
Referring to FIG. 1, each of nodes U0, U1, U2 and U3 may represent a system adapted to transfer data according to the IEEE-1394 protocol. Each of the nodes U0, U1, U2, and U3 may have an input and an output port for data transfer. As shown in FIG. 1, the node U0 may serve as a root node, which may be positioned on a top (e.g., vertex) of the network topology, and may serve as an arbiter for the bus. When a node other than the root node U0, for example, the node U1, needs to transmit data via the bus, the node U1 may send a bus request to the node U0. The node U0 may perform bus arbitration and may send a bus grant the node U1. The node U1 may receive the bus grant from the root node U0, and data may transmit data to another node (e.g., U2, U3, etc.) via the bus. The transmitting node U1 may continue to transmit data and the receiving nodes (e.g., U2, U3, etc.) may receive data during a data transmission duration time, which may be specified by IEEE-1394 specification (e.g., 20 ms).
Each of the nodes U0, U2, U3 may individually determine whether received data is intended for itself by checking address information included in a header of the received data. When a CRC error is detected in a header of the received data, the remaining data no longer needs to be transmitted from the transmitting node U1 or received by the receiving nodes U0, U2 and U3. However, in related art bus systems (e.g., according to the IEEE-1394 bus standard), the transmitting node U1 may continue to transmit data and the receiving nodes U0, U2 and U3 continue to receive the data during the entire data transmission duration time. As a result, bus resources may be unnecessarily wasted during at least one data transmission duration time.
FIG. 2 is a flow chart illustrating a related art data transmission process for a related art bus system (e.g., according to the IEEE-1394 standard).
Referring to FIG. 2, at S210, a transmitting node may send a bus request command to a root node and may receive a bus grant command from the root node.
At S220, the transmitting node, granted bus usage by the root node, may start transmitting data via the bus and other remaining nodes (e.g., receiving nodes) may start to receive data. At S230, the receiving nodes may verify an integrity of received data by checking a CRC of a data header included in the received data.
However, regardless of whether the CRC error is detected, the receiving nodes continue to receive data during data transmission duration time (e.g., S240 and S250). When a CRC error is detected, the received data may be flushed, at S255, the bus may be released by the transmitting node, at S260, and the process may restart from S210.
When a CRC error is not detected in the data header, the bus may be released by the transmitting node, at S260, and the process may restart at S210. The above described process may be repeated, for example, each time a transmitting node sends a bus request command to a root node.